View MRFIC1818_132648.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MRFIC1818/D
The MRFIC Line
1800 MHz GaAs Integrated Power Amplifier
Designed specifically for application in Pan European digital 1.0 watt DCS1800 handheld radios, the MRFIC1818 is specified for 33 dBm output power with power gain over 30 dB from a 4.8 volt supply. With minor tuning changes, the MRFIC1818 can be used for PCS1900 as well as PCS CDMA. To achieve this superior performance, Motorola's planar GaAs MESFET process is employed. The device is packaged in the PFP-16 Power Flat Package which gives excellent thermal and electrical performance through a solderable backside contact while allowing the convenience and cost benefits of reflow soldering. * Minimum Output Power Capabilities 33 dBm @ 4.8 Volts 32 dBm @ 4.0 Volts * Specified 4.8 Volt Characteristics RF Input Power = 3.0 dBm RF Output Power = 33 dBm Minimum PAE = 35% * Low Current required from Negative Supply - 2 mA max * Guaranteed Stability and Ruggedness * Order MRFIC1818R2 for Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel. * Device Marking = M1818 ABSOLUTE MAXIMUM RATINGS (TA = 25C, ZO = 50 , unless otherwise noted)
Rating DC Positive Supply Voltage DC Negative Supply Voltage RF Input Power RF Output Power Operating Case Temperature Range Storage Temperature Range Thermal Resistance, Junction to Case Symbol VD1, 2, 3 VSS Pin Pout TC Tstg RJC
MRFIC1818
1700-1900 MHz MMIC DCS1800/PCS1900 INTEGRATED POWER AMPLIFIER GaAs MONOLITHIC INTEGRATED CIRCUIT
CASE 978-02 (PFP-16)
Value 7.5 -5 10 36 - 35 to +85 -55 to +150 10
Unit Vdc Vdc dBm dBm C C C/W
GND
9
8 7 6 5 4 3 2 1
VG VD3 RF OUT RF OUT RF OUT RF OUT N/C GND
VD2 10 VD2 11 VD1 12 N/C 13 GND 14 RF IN 15 N/C 16
Pin Connections and Functional Block Diagram
REV 2
MOTOROLA RF (c) Motorola, Inc. 1997 DEVICE DATA
MRFIC1818 1
RECOMMENDED OPERATING RANGES
Parameter Supply Voltage Gate Voltage RF Frequency Range RF Input Power Symbol VD1, 2, 3 VSS fRF PRF Value 2.7 to 6 -3.5 to -4.5 1700 to 1900 0 to 6 Unit Vdc Vdc MHz dBm
ELECTRICAL CHARACTERISTICS (VD1, 2, 3 = 4.8 V, VSS = -4 V, Pin = 3 dBm, Peak Measurement at 12.5% Duty Cycle, 4.6 ms
Period, TA = 25C unless otherwise noted. Measured in Reference Circuit Shown in Figure 1.) Characteristic Frequency Range Output Power Power Added Efficiency Output Power (Tuned for PCS Band, 1850 to 1910 MHz) Power Added Efficiency (Tuned for PCS Band, 1850 to 1910 MHz) Input VSWR Harmonic Output (2nd and 3rd) Output Power at Low voltage (VD1, VD2, VD3= 4.0 V) Output Power, Isolation (VD1, VD2, VD3 = 0 V) Noise Power (In 100 kHz, 1805 to 1880 MHz) Stability - Spurious Output (Pin = 5 dBm, Pout = 0 to 33 dBm, Load VSWR = 6:1 at any Phase Angle, Source VSWR = 3:1, at any Phase Angle) (1) Load Mismatch stress (Pout = 33 dBm, Load VSWR = 10:1 at any Phase Angle) (1) 3 dB VDD Bandwidth Negative Supply Current (1) Adjust VD1, 2, 3 (0 to 4.8 V) for specified Pout; Duty Cycle = 12.5%, Period = 4.6 ms. VD1 VD2 VD3 VSS R1 T4 C9 C8 T3 NC C7 C6 L2 RF IN NC C1 C2, C6, C8 C3, C7, C9 C4 C10 6.8 nF 22 pF, NPO/COG 47 nF 27 pF, NPO/COG 0.5 pF T2
9 10 11 12 13 14 15 16 8
Min 1710 33 35 -- -- -- -- 32 -- -- --
Typ -- 34.5 42 34.5 42 2:1 -35 33 -40 - 85 --
Max 1785 -- -- -- -- -- -30 -- -35 -80 -60
Unit MHz dBm % dBm % VSWR dBc dBm dBm dBm dBc
No Degradation in Output Power after Returning to Standard Conditions -- -- 2 0.7 -- 2 MHz mA
R2 C1
L1
7 6 5 4 3 2 1
C10
C2 T1
C3 C4 RF OUT C5
NC
C5 3.9 pF, NPO/COG L1 18 nH, Coilcraft L2 1.8 nH, Toko 2012 R1, R2 = 2.7 K
T1 1.4 mm 25 Microstrip Line T2 5 mm 50 Microstrip Line T3 4 mm 50 Microstrip Line T4 0.5 mm 50 Microstrip Line Board Material: Glass/Epoxy, r = 4.45, Thickness = 0.5 mm
NOTE: For PCS/DCS1900 applications, the following components are used. C5 = 2.7 pF, 0603 NPO/COG L2 = 1.5 nH, Toko 2012 T3 = 1 mm 50 Microstrip Line
Figure 1. Reference Circuit Configuration MRFIC1818 2 MOTOROLA RF DEVICE DATA
Vreg 3.0 V 0V 0V C15
1 2 3 14
VBAT R3
5 6 7
D D D
G S S
4 3 2 1
VRAMP IDLE
3.0 V C18 C19
13
8D
Q1 R5 -4.0 V R2
C16
12 11 10 9 8
C14 CR1
4 5
C17 R1
C13
6 7
C11 T4
9 10
VG TUNE
8
U2 R4 C12 C10 C9 NC T2 RF IN L2 NC T3
L1
7 6 5 4 3 2 1 11 12 13 14 15 16
C1 C2 T1 C3 C4 RF OUT
IN
NC
C6
U1 C1 6.8 nF C2, C9, C10 22 pF, 0603 NPO/COG C3, C11 47 nF C4 27 pF, 0603 NPO/COG C6 3.9 pF, 0603 NPO/COG C12 220 nF C13, C16, C17, C19 1 F C14, C15 1 F C18 1 F CR1 MMBD701LT1 L1 18 nH, Coilcraft or 20 mm 50 Microstrip Line L2 1.8 nH, Toko 2012 or 5 mm 50 Line Q1 MMSF4N01HD R1, R2 2.7 k R3, R4 100 R5 470 T1 2 mm 25 Microstrip Line T2 5 mm 50 Microstrip Line T3 8 mm 40 Microstrip Line T4 1 mm 40 Microstrip Line U1 MRFIC1818 U2 MC33169 (-4 V Version) Board Material: Glass/Epoxy, r = 4.45, Thickness = 0.5 mm
NOTE: For PCS/DCS1900 applications, the following component values are changed. C6 = 2.7 pF, 0603 NPO/COG L2 = 1.5 nH, Toko 2012 T3 = 1 mm 50 Microstrip Line
Figure 2. DCS1800 Applications Circuit Configuration
MOTOROLA RF DEVICE DATA
MRFIC1818 3
Typical Characteristics
35 PAE, POWER ADDED EFFICIENCY (%) 46 44 42 25C 40 85C 38 36 34 1.7 Pin = 3 dBm VD1, VD2, VD3 = 4.8 V VSS = -4 V 1.72 1.74 1.76 f, FREQUENCY (GHz) 1.78 1.8 TA = -35C
Pout , OUTPUT POWER (dBm)
34 TA = -35C 33 25C 32 Pin = 3 dBm VD1, VD2, VD3 = 4 V VSS = -4 V 1.72 1.74 1.76 f, FREQUENCY (GHz) 1.78 1.8 85C
31
30 1.7
Figure 3. Output Power versus Frequency
Figure 4. Power Added Efficiency versus Frequency
36 PAE, POWER ADDED EFFICIENCY (%)
44 VD1 = VD2 = 5.6 V 42 4V 40 Pin = 3 dBm TA = 25C VSS = -4 V 38 1.7 1.72 1.74 1.76 f, FREQUENCY (GHz) 1.78 1.8 4.8 V
Pout , OUTPUT POWER (dBm)
35
TA = -35C 25C 85C
34
33
Pin = 3 dBm VD1, VD2, VD3 = 4.8 V VSS = -4 V 1.72 1.74 1.76 f, FREQUENCY (GHz) 1.78 1.8
32 1.7
Figure 5. Output Power versus Frequency
Figure 6. Power Added Efficiency versus Frequency
37
40 30 25C AND 85C
Pout , OUTPUT POWER (dBm)
Pout , OUTPUT POWER (dBm)
20 10 0 -10 -20 -30 -40 -50 -60 f = 1.75 GHz Pin = 3 dBm VSS = -4 V 0 1 3 4 2 VD1, VD2, DRAIN VOLTAGE (VOLTS) 5 6 TA = -35C
36 25C 35 Pin = 3 dBm VD1, VD2, VD3 = 5.6 V VSS = -4 V 34 1.7 1.72
TA = -35C
85C
1.74 1.76 f, FREQUENCY (GHz)
1.78
1.8
Figure 7. Output Power versus Frequency
Figure 8. Output Power versus Drain Voltage
MRFIC1818 4
MOTOROLA RF DEVICE DATA
Typical Characteristics
45 PAE, POWER ADDED EFFICIENCY (%) 40 35 30 25 20 15 10 5 0 0 1 3 4 2 VD1, VD2, DRAIN VOLTAGE (VOLTS) 5 6 f = 1.75 GHz Pin = 3 dBm VSS = -4 V 25C TA = -35C 85C Pout , OUTPUT POWER (dBm) 35 33 31 29 27 25 23 21 19 17 15 -20 -15 85C f = 1.75 GHz VD1, VD2, VD3 = 4.8 V VSS = -4 V -10 -5 0 Pin, INPUT POWER (dBm) 5 10 25C TA = -35C
Figure 9. Power Added Efficiency versus Drain Voltage
Figure 10. Output Power versus Input Power
45 PAE, POWER ADDED EFFICIENCY (%) 40 35 30 25 20 15 10 5 0 -20 -15 f = 1.75 GHz VD1, VD2, VD3 = 4.8 V VSS = -4 V -10 -5 0 Pin, INPUT POWER (dBm) 5 10 85C 25C TA = -35C H2 , SECOND HARMONIC (dBc)
50 48 46 44 42 40 38 36 34 32 30 0 2 4 VD1, VD2, DRAIN VOLTAGE (VOLTS) 6 f = 1.75 GHz Pin = 3 dBm VSS = -4 V TA = -35C 25C 85C
Figure 11. Power Added Efficiency versus Input Power
Figure 12. Second Harmonic versus Drain Voltage
41 39 Pout , OUTPUT POWER (dBm) H3 , THIRD HARMONIC (dBc) TA = -35C 37 35 33 31 29 27 25 0 2 4 VD1, VD2, DRAIN VOLTAGE (VOLTS) 6 85C f = 1.75 GHz Pin = 3 dBm VSS = -4 V 25C
36 TA = -35C 25C 35 85C 34.5 Pin = 3 dBm VD1, VD2, VD3 = 4.8 V VSS = -4 V 1.86 1.88 1.89 1.87 f, FREQUENCY (GHz) 1.9 1.91
35.5
34
33.5 1.85
Figure 13. Third Harmonic versus Drain Voltage
Figure 14. Output Power Versus Frequency - PCS Band
MOTOROLA RF DEVICE DATA
MRFIC1818 5
Typical Characteristics
ACPR, ADJACENT CHANNEL POWER (dBc) 47 PAE, POWER ADDED EFFICIENCY (%) TA = -35C 45 25C 43 85C 41 Pin = 3 dBm VD1, VD2, VD3 = 4.8 V VSS = -4 V 1.86 1.88 1.89 1.87 f, FREQUENCY (GHz) 1.9 1.91 50 5.6 V 45 VD1, VD2, VD3 = 4.8 V 40
35 f = 1880 MHz Carrier BW = 30 kHz Channel BW = 30 kHz Temp = 25C 15 20 25 Pout, OUTPUT POWER (dBm) 30 35
30
39 1.85
25 10
Figure 15. Power Added Efficiency versus Frequency - PCS Band
Figure 16. CDMA ACPR at 885 kHz Offset versus Output Power
ACPR, ADJACENT CHANNEL POWER (dBc)
50 VD1, VD2, VD3 = 5.6 V 49 4.8 V 48
Table 1. Optimum Loads Derived from Circuit Characterization
Zin OHMS R 9.19 9.35 9.50 9.65 9.60 9.42 9.11 8.77 8.54 jX -30.10 -29.60 -29.30 -29.10 -29.00 -28.79 -28.60 -28.30 -28.15 R 6.00 5.96 5.88 5.80 5.75 5.67 5.60 5.51 5.45 ZOL* OHMS jX 3.80 3.71 3.60 3.46 3.33 3.20 3.07 2.93 2.79
f MHz 1710 1720 1730 1740 1750 1760 1770 1780 1785
47
f = 1880 MHz Carrier BW = 30 kHz Channel BW = 30 kHz Temp = 25C 15 20 25 Pout, OUTPUT POWER (dBm) 30 35
46 10
Figure 17. CDMA ACPR at 1980 kHz Offset versus Output Power
Zin represents the input impedance of the device. ZOL* represents the conjugate of the optimum output load to present to the device.
Table 2. Optimum Loads Derived from Circuit Characterization - PCS Board
Zin OHMS R 3.92 4.01 4.08 4.19 4.29 4.31 4.37 jX -43.30 -43.56 -43.78 -44.00 -44.29 -44.49 -44.81 R 7.70 7.64 7.57 7.51 7.50 7.44 7.35 ZOL* OHMS jX 0.39 0.23 0.15 0.07 -0.04 -0.06 -0.19
f MHz 1850 1860 1870 1880 1890 1900 1910
Zin represents the input impedance of the device. ZOL* represents the conjugate of the optimum output load to present to the device.
MRFIC1818 6
MOTOROLA RF DEVICE DATA
APPLICATIONS INFORMATION
Design Philosophy The MRFIC1818 is a 3-stage Integrated Power Amplifier designed for use in cellular phones, especially for those used in DCS1800 (PCN) 4.8 V operation. With matching circuit modifications, it is also applicable for use in DCS1900 (PCS) equipment. Due to the fact that the input, output and some of the interstage matching is accomplished off chip, the device can be tuned to operate anywhere within the 1500 to 2000 MHz frequency range. Typical performance at different battery voltages is: * 36 dBm @ 6.0 V * 34.5 dBm @ 4.8 V * 32.0 dBm @ 3.6 V This capability makes the MRFIC1818 suitable for portable cellular applications such as: * 6V and 4.8 V DCS1800 Class I * 6V and 4.8 V PCS tag5 * 3.6 V DCS1800 Class II RF Circuit Considerations The MRFIC1818 can be tuned by changing the values and/or positions of the appropriate external components. Refer to Figure 2, a typical DCS1800 Class I applications circuit. The input match is a shunt-L, series-C, High-pass structure and can be retuned as desired with the only limitation being the on-chip 6 pF blocking capacitor. For saturated applications such as DCS1800 and DCS1900, the input match should be optimized at the rated RF input power. Interstage matching can be optimized by changing the value and/or position of the decoupling capacitor on the VD1 and VD2 supply lines. Moving the capacitor closer to the device or reducing the value increases the frequency of resonance with the in-ductance of the device's wirebonds and leadframe pin. Output matching is accomplished with a one-stage low- pass network as a compromise between bandwidth and harmonic rejection. Implementation is through chip capacitors mounted along a 30 or 50 W microstrip transmission line. Values and positions are chosen to present a 2.5 W loadline to the device while conjugating the device output parasitics. The network must also properly terminate the second and third harmonics to optimize efficiency and reduce harmonic output. Low-Q commercial chip capacitors are used for the shunt capacitors, as shown in Figure 2. Loss in circuit traces must also be considered. The output transmission line and the bias supply lines should be at least 0.6 mm in width to accommodate the peak circulating currents which can be as high as 2 amperes under worst case conditions. The bias supply line which supplies the output should include an RF choke of at least 18 nH, surface mount solenoid inductors or quarter wave microstrip lines. Discrete inductors will usually give better efficiency and conserve board space. The DC blocking capacitor required at the output of the device is best mounted at the 50 W impedance point in the circuit where the RF current is at a minimum and the capacitor loss will have less effect. Biasing Considerations Gate bias lines are tied together and connected to the VSS voltage, allowing gate biasing through use of external resistors or positive voltages. This allows setting the quiescent current of all stage in the same time while saving some board MOTOROLA RF DEVICE DATA space. For applications where the amplifier is operated close to saturation, such as TDMA amplifiers, the gate bias can be set with resistors. Variations in process and tempera-ture will not affect amplifier performance significantly in these applications. The values shown in the Figure 1 will set quies- cent currents of 20 to 40 mA for the first stage, 150 to 300 for the second stage and 400 to 800 mA for the final stage. For linear modes of operation which are required for CDMA amplifiers, the quiescent current must be more carefully controlled. For these applications, the VG pins can be referenced to some tunable voltage which is set at the time of radio manufacturing. Less than 1 mA is required in the divider network so a DAC can be used as the voltage source. Power Control Using the MC33169 The MC33169 is a dedicated GaAs power amplifier support IC which provides the -4 V required for VSS, an N-MOS drain switch interface and driver and power supply sequencing. The MC33169 can be used for power control in applications where the amplifier is operated in saturation since the output power in non-linear operation is proportional to VD2. This provides a very linear and repeatable power control transfer function. This technique can be used open loop to achieve 40-45 dB dynamic range over process and temperature variation. With careful design and selection of calibration points, this technique can be used for DCS1800 control where 30 dB dynamic range is required, eliminating the need for the complexity and cost of closed-loop control. The transmit waveform ramping function required for systems such as DCS1800 can be implemented with a simple Sallen and Key filter on the MC33169 control loop. The amplifier is then ramped on as the VRAMP pin is taken from 0 V to 3 V. To implement the different power steps required for DCS1800, the VRAMP pin is ramped between 0 V and the appropriate voltage between 0 V and 3 V for the desired output power. For closed-loop configurations using the MC33169, MMSF4N01HD N-MOS switch and the MRFIC1818 provide a typical 1 MHz 3 dB loop bandwidth. The STANDBY pin must be enabled (3 V) at least 800 s before the VRAMP pin goes high and disabled (0 V) at least 20 s before the VRAMP pin goes low. This STANDBY function allows for the enabling of the MC33169 one burst before the active burst thus reducing power consumption. Conclusion The MRFIC1818 offers the flexibility in matching circuitry and gate biasing required for portable cellular applications. Together with the MC33169 support IC, the device offers an efficient system solution for TDMA applications such as DCS1800 where saturated amplifier operation is used. For more information about the power control using the MC33169, refer to application note AN1599, "Power Control with the MRFIC0913 GaAs Integrated Power Amplifier and MC33169 Support IC." Evaluation Boards Two versions of the MRFIC1818 evaluation board are available. Order MRFIC1818DCSTF for the 1.8 GHz version and order MRFIC1818PCSTF for the 1.9 GHz version. For a complete list of currently available boards and ones in development for newly introduced product, please contact your local Motorola Distributor or Sales Office. MRFIC1818 7
PACKAGE DIMENSIONS
h X 45 _ A E2
1 16 NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 5. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION IS 0.127 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-. MILLIMETERS MIN MAX 2.000 2.350 0.025 0.152 1.950 2.100 6.950 7.100 4.372 5.180 8.850 9.150 6.950 7.100 4.372 5.180 0.466 0.720 0.250 BSC 0.300 0.432 0.300 0.375 0.180 0.279 0.180 0.230 0.800 BSC --- 0.600 0_ 7_ 0.200 0.200 0.100
14 x e
D e/2
D1
8
9
E1
8X
B
BOTTOM VIEW
E CB
S DATUM PLANE
bbb
M
c A A2
DETAIL Y
C
SEATING PLANE
L1
ccc C
q
W W L 1.000 0.039 DETAIL Y A1
GAUGE PLANE
CASE 978-02 ISSUE A
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 303-675-2140 or 1-800-441-2447 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. 81-3-5487-8488
MfaxTM: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 INTERNET: http://motorola.com/sps
MRFIC1818 8
EEE CCC EEE CCC
b aaa
M
H
b1 c1
CA
S
SECT W-W
DIM A A1 A2 D D1 E E1 E2 L L1 b b1 c c1 e h
q
aaa bbb ccc
MRFIC1818/D MOTOROLA RF DEVICE DATA

▲Up To Search▲

Price & Availability of MRFIC1818

	To Download MRFIC1818 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .